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| author | Jesse Luehrs <doy@tozt.net> | 2014-10-01 15:00:00 -0400 |
|---|---|---|
| committer | Jesse Luehrs <doy@tozt.net> | 2014-10-01 15:00:00 -0400 |
| commit | 935dbe6f3815e2daaba88c69cb087c8ec6ad1844 (patch) | |
| tree | 4b9262ac18a32a9db67f6811e066bf82edbcacfc | |
| download | nes-input-test-935dbe6f3815e2daaba88c69cb087c8ec6ad1844.tar.gz nes-input-test-935dbe6f3815e2daaba88c69cb087c8ec6ad1844.zip | |
initial framework for creating roms
| -rw-r--r-- | .gitignore | 3 | ||||
| -rw-r--r-- | Makefile | 24 | ||||
| -rw-r--r-- | header.bin | bin | 0 -> 16 bytes | |||
| -rw-r--r-- | linkfile | 2 | ||||
| -rw-r--r-- | test.s | 67 |
5 files changed, 96 insertions, 0 deletions
diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..880005c --- /dev/null +++ b/.gitignore @@ -0,0 +1,3 @@ +*.o +*.rom +*.nes diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..1c24c9e --- /dev/null +++ b/Makefile @@ -0,0 +1,24 @@ +NAME = test +OBJS = test.o + +CC = wla-6502 +LD = wlalink + +CFLAGS = +LDFLAGS = + +all: $(NAME).nes + +$(NAME).nes: $(NAME).rom header.bin + @cat header.bin $< > $@ + +$(NAME).rom: $(OBJS) linkfile + @$(LD) $(LDFLAGS) linkfile $@ + +%.o: %.s + @$(CC) $(CFLAGS) -o $< + +clean: + @rm -f $(OBJS) $(NAME).rom $(NAME).nes + +.PHONY: all clean diff --git a/header.bin b/header.bin Binary files differnew file mode 100644 index 0000000..d5ba821 --- /dev/null +++ b/header.bin diff --git a/linkfile b/linkfile new file mode 100644 index 0000000..02a5a2e --- /dev/null +++ b/linkfile @@ -0,0 +1,2 @@ +[objects] +test.o @@ -0,0 +1,67 @@ +.MEMORYMAP
+SLOTSIZE $2000
+DEFAULTSLOT 0
+SLOT 0 $C000
+SLOT 1 $E000
+.ENDME
+
+.ROMBANKMAP
+BANKSTOTAL 2
+BANKSIZE $2000
+BANKS 2
+.ENDRO
+
+
+ .bank 0
+ .org $0000
+RESET:
+ SEI ; disable IRQs
+ CLD ; disable decimal mode
+ LDX #$40
+ STX $4017.W ; disable APU frame IRQ
+ LDX #$FF
+ TXS ; Set up stack
+ INX ; now X = 0
+ STX $2000.W ; disable NMI
+ STX $2001.W ; disable rendering
+ STX $4010.W ; disable DMC IRQs
+
+vblankwait1: ; First wait for vblank to make sure PPU is ready
+ BIT $2002
+ BPL vblankwait1
+
+clrmem:
+ LDA #$00
+ STA $0000, x
+ STA $0100, x
+ STA $0200, x
+ STA $0400, x
+ STA $0500, x
+ STA $0600, x
+ STA $0700, x
+ LDA #$FE
+ STA $0300, x
+ INX
+ BNE clrmem
+
+vblankwait2: ; Second wait for vblank, PPU is ready after this
+ BIT $2002
+ BPL vblankwait2
+
+ LDA #%10000000 ;intensify blues
+ STA $2001
+
+Forever:
+ JMP Forever ;jump back to Forever, infinite loop
+
+NMI:
+ RTI
+
+
+ .bank 1 slot 1
+ .orga $FFFA ;first of the three vectors starts here
+ .dw NMI ;when an NMI happens (once per frame if enabled) the
+ ;processor will jump to the label NMI:
+ .dw RESET ;when the processor first turns on or is reset, it will jump
+ ;to the label RESET:
+ .dw 0 ;external interrupt IRQ is not used in this tutorial
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