project skeleton

6 files changed, 186 insertions, 0 deletions

diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..880005c
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1,3 @@
+*.o
+*.rom
+*.nes
diff --git a/Makefile b/Makefile
new file mode 100644
index 0000000..316e9fb
--- /dev/null
+++ b/Makefile
@@ -0,0 +1,27 @@
+NAME = snake
+OBJS = snake.o
+
+CC = wla-6502
+LD = wlalink
+
+CFLAGS =
+LDFLAGS =
+
+all: $(NAME).nes
+
+$(NAME).nes: $(NAME).rom header.bin
+	@cat header.bin $< > $@
+
+$(NAME).rom: $(OBJS) linkfile
+	@$(LD) $(LDFLAGS) linkfile $@
+
+%.o: %.s
+	@$(CC) $(CFLAGS) -o $<
+
+run: $(NAME).nes
+	fceux $(NAME).nes
+
+clean:
+	@rm -f $(OBJS) $(NAME).rom $(NAME).nes
+
+.PHONY: all clean
diff --git a/header.bin b/header.bin
new file mode 100644
index 0000000..d5ba821
--- /dev/null
+++ b/header.bin
diff --git a/linkfile b/linkfile
new file mode 100644
index 0000000..c41ff42
--- /dev/null
+++ b/linkfile
@@ -0,0 +1,2 @@
+[objects]
+snake.o
diff --git a/snake.chr b/snake.chr
new file mode 100644
index 0000000..6d17cf9
--- /dev/null
+++ b/snake.chr
diff --git a/snake.s b/snake.s
new file mode 100644
index 0000000..f0cf151
--- /dev/null
+++ b/snake.s
@@ -0,0 +1,154 @@
+.MEMORYMAP
+DEFAULTSLOT  0
+SLOTSIZE     $4000
+SLOT 0       $C000
+SLOTSIZE     $2000
+SLOT 1       $0000 ; location doesn't matter, CHR data isn't in main memory
+.ENDME
+
+.ROMBANKMAP
+BANKSTOTAL  2
+BANKSIZE    $4000
+BANKS       1
+BANKSIZE    $2000
+BANKS       1
+.ENDRO
+
+
+  .enum $0000
+buttons_pressed DB
+  .ende
+
+
+  .bank 0
+  .org $0000
+RESET:
+  SEI          ; disable IRQs
+  CLD          ; disable decimal mode
+  LDX #$40
+  STX $4017.W    ; disable APU frame IRQ
+  LDX #$FF
+  TXS          ; Set up stack
+  INX          ; now X = 0
+  STX $2000.W    ; disable NMI
+  STX $2001.W    ; disable rendering
+  STX $4010.W    ; disable DMC IRQs
+
+vblankwait1:       ; First wait for vblank to make sure PPU is ready
+  BIT $2002
+  BPL vblankwait1
+
+clrmem:
+  LDA #$00
+  STA $0000, x
+  STA $0100, x
+  STA $0300, x
+  STA $0400, x
+  STA $0500, x
+  STA $0600, x
+  STA $0700, x
+  LDA #$FE
+  STA $0200, x    ;move all sprites off screen
+  INX
+  BNE clrmem
+
+vblankwait2:      ; Second wait for vblank, PPU is ready after this
+  BIT $2002
+  BPL vblankwait2
+
+LoadPalettes:
+  LDA $2002    ; read PPU status to reset the high/low latch
+  LDA #$3F
+  STA $2006    ; write the high byte of $3F00 address
+  LDA #$00
+  STA $2006    ; write the low byte of $3F00 address
+  LDX #$00
+LoadPalettesLoop:
+  LDA palette.w, x        ;load palette byte
+  STA $2007             ;write to PPU
+  INX                   ;set index to next byte
+  CPX #$20            
+  BNE LoadPalettesLoop  ;if x = $20, 32 bytes copied, all done
+
+  ; initialize variables in ram
+  LDA #$00
+  STA buttons_pressed.w
+
+  LDA #%00010000   ; enable sprites
+  STA $2001
+
+  LDA #%10000000   ; enable NMI interrupts
+  STA $2000
+
+loop:
+  JMP loop
+
+read_controller1:
+  ; latch
+  LDA #$01
+  STA $4016
+  LDA #$00
+  STA $4016
+
+  ; clock
+  LDX #$00
+read_controller1_values:
+  CPX #$08
+  BPL end_read_controller1
+
+  LDA $4016
+  AND #%00000001
+  ASL buttons_pressed.w
+  ORA buttons_pressed.w
+  STA buttons_pressed.w
+  INX
+  JMP read_controller1_values
+
+end_read_controller1:
+  RTS
+
+NMI:
+  JSR read_controller1
+
+handle_up:
+  LDA buttons_pressed.w
+  AND #%00001000
+  CMP #$00
+  BEQ handle_down
+
+handle_down:
+  LDA buttons_pressed.w
+  AND #%00000100
+  CMP #$00
+  BEQ handle_left
+
+handle_left:
+  LDA buttons_pressed.w
+  AND #%00000010
+  CMP #$00
+  BEQ handle_right
+
+handle_right:
+  LDA buttons_pressed.w
+  AND #%00000001
+  CMP #$00
+  BEQ nmi_return
+
+nmi_return:
+  RTI
+
+palette:
+  .db $0F,$31,$32,$33,$0F,$35,$36,$37,$0F,$39,$3A,$3B,$0F,$3D,$3E,$0F
+  .db $0F,$1C,$15,$14,$0F,$02,$38,$3C,$0F,$1C,$15,$14,$0F,$02,$38,$3C
+
+  .orga $FFFA    ;first of the three vectors starts here
+  .dw NMI        ;when an NMI happens (once per frame if enabled) the 
+                   ;processor will jump to the label NMI:
+  .dw RESET      ;when the processor first turns on or is reset, it will jump
+                   ;to the label RESET:
+  .dw 0          ;external interrupt IRQ is not used in this tutorial
+
+
+  .bank 1 slot 1
+  .org $0000
+  .incbin "snake.chr"